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July 13,2009 - Micrologic To Participate In DAC San Francisco 2009

 
San Jose, CA; July 9, 2009 - Micrologic Design Automation, Inc., will present its products at DAC from July 26-31 in San Francisco, in booth number 3259. “Micrologic’s products, which are packaged in its NanoToolBox™, eliminate most of the iterations needed in the custom layout domain between the layout and the verification tools, dramatically shortening the overall layout process”. Said Micrologic’s CTO Dr. Danny Rittman.
 
VisualDRC™ reads the signoff DRC rule-deck into the layout editor, so that the rules are graphically highlighted as the engineer places and moves polygons, and the layout is correct-by-construction. It treats all of the DRC and DFM rules including the most complex ones.
 
NanoRVInteractive™ enables interactive reliability checks such as Electromigration, antenna and fuse effects much before simulation results are available.
 
“With geometries going down to 65, 40, 32nm and below, the complexity of the DRC and reliability rules grows dramatically, making it impossible for a layout engineer to remember them all” said Coby Hanoch, Micrologic’s VP sales. “Micrologic’s products are seamlessly integrated with Cadence’s Virtuoso™ and SpringSoft’s Laker™, and visually show the rules to the engineer, significantly shortening the design cycle and increasing the overall quality of the design.” For a demo please email: info@micrologic-da.com
 
About Micrologic
Micrologic Design Automation dramatically shortens the IC (Integrated Circuit) custom layout design cycle by providing software tools which display live rules visually in the layout editor and enable generating ‘signoff ready’ products. Please visit Micrologic’s web site: www.micrologic-da.com

 
Press Contact
David Andrew Goldman
Global Communications
Expansion Media, LLC
davidgoldman@ExpansionMedia.net
P: 646-335-0268


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